Single layer touch sensor

ABSTRACT

Embodiments described herein provide capacitance sensing devices and methods for forming such devices. The capacitance sensing devices include a substrate having a central and an outer portion. A plurality of substantially co-planar electrodes are on the central portion substrate. A first plurality of conductors are on the substrate. Each of the first plurality of conductors has a first end portion electrically connected to one of the plurality of electrodes and a second end portion on the outer portion of the substrate. An insulating material is coupled to the second end portions of the first plurality of conductors. A second plurality of conductors are coupled to the insulating material. Each of the second plurality of conductors is electrically connected to the second end portion of at least some of the first plurality of conductors and is insulated from the second end portion of the others of the first plurality of conductors.

RELATED APPLICATION

This application is a continuation of U.S. patent application Ser. No.13/528,644, filed Jun. 20, 2012, which is a continuation of U.S. patentapplication Ser. No. 13/405,071, filed Feb. 24, 2012, which claims thebenefit of U.S. Provisional Application No. 61/446,178, filed Feb. 24,2011, and U.S. Provisional Application No. 61/559,590, filed Nov. 14,2011, all of which are incorporated by reference herein in theirentirety.

TECHNICAL FIELD

This disclosure relates to the field of touch sensors and, inparticular, to capacitive sensors.

BACKGROUND

In recent years, touch pads, or capacitive sensor devices, have becomeincreasing integrated in various industries and product lines. Often,these sensors have the ability to detect multiple objects (e.g.,fingers) simultaneously.

Touch sensors are an expensive part of the user interface system. Onereason for the high cost of touch sensors is that conventional sensorsuse either multiple layers of materials formed on multiple substrates ora single substrate with a series of “jumpers” to form electricalconnection between the individual electrode segments and insulate themfrom the other electrodes that intersect them.

BRIEF DESCRIPTION OF THE DRAWINGS

The present disclosure is illustrated by way of example, and not by wayof limitation, in the figures of the accompanying drawings.

FIG. 1 is a simplified plan view of a touch sensor device according toone embodiment;

FIG. 2 is a simplified cross-sectional view of the touch sensor deviceof FIG. 1 taken along line 2-2;

FIG. 3 is a plan view of an embodiment of a touch sensor array;

FIG. 4 is a plan view illustrating a portion of the touch sensor arrayof FIG. 3 in greater detail;

FIG. 5 is a plan view illustrating another embodiment of a touch sensorarray;

FIG. 6 is a plan view of a bezel portion of the touch sensor array ofFIG. 1;

FIGS. 7 and 8 are cross-sectional views of the bezel portion of FIG. 6taken along lines 7-7 and 8-8, respectively;

FIGS. 9, 10, and 11 are plan views illustrating an embodiment of a bezelportion of a touch sensor array during the formation thereof;

FIG. 12 is plan view illustrating a further embodiment of a touch sensorarray;

FIG. 13 is a plan view illustrating another embodiment of a touch sensorarray;

FIG. 14 is a schematic plan view illustrating the bezel portion of atouch sensor array and a flexible printed circuit (FPC);

FIG. 15 is a plan view illustrating another embodiment of a touch sensorarray;

FIG. 16 is a plan view illustrating a portion of the touch sensor array,taken on Detail A, of FIG. 15;

FIG. 17 is a cross-sectional view of the touch sensor array of FIG. 16taken along line 17-17;

FIG. 18 is a plan view illustrating another embodiment of a touch sensorarray;

FIG. 19 is a plan view illustrating a portion of the touch sensor array,taken on Detail A, in FIG. 18;

FIG. 20 is a plan view illustrating a portion of the touch sensor array,taken on Detail B, in FIG. 18;

FIG. 21 is a plan view illustrating another embodiment of a touch sensorarray;

FIG. 22 is a plan view of a portion of another embodiment of a touchsensor array;

FIGS. 23-25 are side views of the touch sensor array of FIG. 22;

FIGS. 26-30 are plan views illustrating sensor electrodes according tovarious alternative embodiments; and

FIG. 31 is a block diagram illustrating an embodiment of an electronicsystem.

DETAILED DESCRIPTION

Reference in the description to “one embodiment” or “an embodiment”means that a particular feature, structure, or characteristic describedin connection with the embodiment is included in at least one embodimentof the invention. The phrase “in one embodiment” located in variousplaces in this description does not necessarily refer to the sameembodiment.

In the following detailed description, for purposes of explanation,numerous specific details are set forth in order to provide a thoroughunderstanding of the subject matter of the present application. It willbe evident, however, to one skilled in the art that the disclosedembodiments, the claimed subject matter, and their equivalents may bepracticed without these specific details.

The detailed description includes references to the accompanyingdrawings, which form a part of the detailed description. The drawingsshow illustrations in accordance with exemplary embodiments. Theseembodiments, which may also be referred to herein as “examples,” aredescribed in enough detail to enable those skilled in the art topractice the embodiments of the claimed subject matter described herein.The embodiments may be combined, other embodiments may be utilized, orstructural, logical, and electrical changes may be made withoutdeparting from the scope and spirit of the claimed subject matter. Itshould be understood that the embodiments described herein are notintended to limit the scope of the subject matter but rather to enableone skilled in the art to practice, make, and/or use the subject matter.

Attempts have been made in the past to reduce the number of layers, andthus the manufacturing costs, of touch sensors. There are several singlelayer sensors available that are suited only for single touch reception.These sensors typically use a series of electrodes the width of whichlinearly change from one end to the other end of the electrode. Usingthe signal variation along the electrode's length, the coordinate alongthe electrode's axis is determined. The coordinate in the perpendiculardirection to the electrodes axis is determined by the conventionaldigitization method.

Another possibility for a single layer multiple-touch sensor uses anarray of pads filling the sensor area, and sensing each of the pads (orelectrodes) individually in a self capacitance sensing mode. However,such requires independent traces for each of the sensing pads and a verylarge number of measuring channels and pins on the controller chip toget an acceptable accuracy for even a small size sensor.

Embodiments of the present invention allow for addressing the sensingpads without requiring an impractically large number of measuring portsor pins on the controller. Additionally, a method of achievingmulti-touch sensors with no bezel is disclosed herein, and theperformance of such sensors is demonstrated.

Embodiments described herein provide a touch sensor device and a methodfor forming a touch sensor device that has a single layer active area.Additionally, the touch sensor device is provided with a wiring schemethat minimizes the number of wires, as well as the layers, (or traces)required to simultaneously detect multiple contact points (i.e.,“touches”). As a result, overall manufacturing costs may be reduced.

FIGS. 1 and 2 are simplified views of a touch sensor device, orcapacitance sensing device, 1 according to one embodiment. In oneembodiment, the touch sensor device 1 is a “touchscreen” device that hasa visible area (or portion) 2 and a non-visible area 3. The touch sensordevice 1 includes a liquid crystal display (LCD) panel 4 arranged belowa touch sensor array (or assembly) 5. As is commonly understood, thevisible area 2 may correspond to the size and shape of a transparentregion of the touch sensor array 5, while the non-visible area maycorrespond to a non-transparent region of the touch sensor array 5 whichmay be covered by a casing (not shown). The touch sensor array 5includes an overlay (or protective layer) 6 attached to a side thereofopposite the LCD panel by an adhesive 7. The touch sensor device 1 alsoincludes a flexible printed circuit (FPC) tail 8 extending therefrom,which as described below may be used to route electrical signals to andfrom the touch sensor array 10.

FIG. 3 is a plan view illustrating a capacitive (or touch) sensor array10 according to one embodiment. The touch sensor array 10 includes asubstrate 12 having a central (or active) portion 14 and outer (orbezel) portions 16 on opposing sides of the central portion 14, near theedges of the substrate 12. The central portion 14 of the substrate 12may correspond to the visible area of the touch sensor device 2 (FIG.1), and the outer portions 16 of the substrate 12 may correspond to thenon-visible area 6 of the touch sensor device 2. In one embodiment, thesubstrate 12 is made of an electrically insulating material with highoptical transmissivity, such as glass, polyethylene terephthalate (PET),or a combination thereof.

An array of electrodes is formed on the central portion 14 of thesubstrate 12, which includes a first set (or plurality) of electrodes(also, “first electrodes”) 18 and a second set of electrodes (also,“second electrodes”) 20. In the embodiment shown in FIG. 3, the firstelectrodes 18 are substantially “comb” shaped having comb members facingdown as shown in FIG. 3. In the depicted embodiment, five firstelectrodes 18 are included, which are arranged horizontally (as shown inFIG. 3) and substantially extend the entire width of the central portion14 of the substrate 14. It should be understood thought that otherembodiments may use different numbers of electrodes.

Still referring to FIG. 3, the second electrodes 20 are substantially“E” shaped and arranged such that the members thereof extend upwards (asshown in FIG. 3). In the embodiment shown, thirty second electrodes 20are included which are arranged in rows (i.e., horizontal rows) 22, eachof which is associated with one of the first electrodes 18, and columns(i.e., vertical rows) 24. In the exemplary embodiment shown, each of therows 22 includes six of the second electrodes 20, and each of thecolumns 24 includes five of the second electrodes 20. Within each row22, the second electrodes 20 are mated with the respective firstelectrode 18 such that the members extending from the first electrodes18 and the second electrodes 20 are inter-digitated. However, specificpatterns shown in FIG. 3 are exemplary, and other electrode shapes whichmay not be inter-digitated are possible.

As shown in FIG. 2, the size and shape of the second electrodes 20 varyacross the central portion 14 of the substrate 12. In particular, thethickness of the horizontal (as shown in FIG. 1) portions (or baseportions) 25 of the second electrodes 20 is greater nearer the center ofthe substrate 12.

As will be described in more detail below, the first electrodes 18 maybe used as “transmitter” (TX) electrodes, and second electrodes 20 maybe used as “receiver” (RX) electrodes. However, it should be understoodthat these roles may be reversed in other embodiments.

Referring now to FIG. 4 in combination with FIG. 3, the touch sensorarray 10 also includes a (first) plurality of conductors, or primarytraces, 26 formed on the substrate 12. In the example shown, the primarytraces 26 extend substantially horizontally (as shown in FIG. 4) acrossthe substrate 12. As shown, each of the primary traces 26 is connectedto, and thus in electrical contact with, a respect one of the firstelectrodes 18 or one of the second electrodes 20 at a first end portionthereof, and has a second end portion extending into one of the outerportions 16 of the substrate. The primary traces 26 may be considered toinclude a first set associated with (i.e., in contact with) the firstelectrodes 18 and a second set associated with the second electrodes 20.

The first electrodes 18, the second electrodes 20, and the primarytraces 26 may be made of indium tin oxide (ITO) and may be formed in asubstantially planar manner. That is, although not specifically shown inFIGS. 3 and 4, the first electrodes 18, the second electrodes 20, andthe primary traces 26 may have substantially the same thickness (e.g.,300 Angstroms (Å)) and lay in substantially the same plane.

Still referring to FIGS. 3 and 4, an insulating material (or body orlayer) 28 is coupled or attached to the outer portions 16 of thesubstrate 12. The insulating material 28 covers the end portions of theprimary traces 26 that extend onto the outer portions 16 of thesubstrate 12. The insulating material 28 may be made of, for example, anepoxy or resin material and have a thickness of, for example, between 5and 25 micrometers (μm) that is deposited on the substrate 12. It shouldbe noted that the insulating material (or insulating bodies) 28 do notextend over the central portion 14 of the substrate.

A (second) plurality of conductors, or secondary traces, 30 are formedon the insulating material 28 over both outer portions 16 of thesubstrate 12. In one embodiment, the secondary traces 30 are made ofsilver. Of particular interest in the depicted embodiment is that eachof the secondary traces 30 is electrically connected to either one (andonly one) primary trace 26 associated with one of the first electrodes18 or all of primary traces 26 associated with the second electrodes 20in one (and only one) of the columns 24 of second electrodes.

For example, referring specifically to FIG. 4, the “first” secondarytrace 30 a (i.e., counting from left to right in FIG. 4) is electricallyconnected to the top-most first electrode 18 a (though the appropriateprimary trace 26), and the “sixth” secondary trace 30 b is electricallyconnected to all of the second electrodes 20 in the left-most column 24of second electrodes 20. The remaining electrical connections betweenthe secondary traces 30 and the primary traces 26, and thus theremaining electrodes 18 and 20, are shown in FIGS. 3 and 4, and aresimilar in both outer portions 16 of the substrate 12.

The insulating material 28 electrically separates each secondary trace30 from the other primary traces 26 (i.e., those to which thatparticular secondary trace 30 is not electrically connected). Forexample, in FIG. 4, the insulating material 28 insulates the “sixth”secondary trace 30 b from the primary traces 26 connected to the secondelectrodes 20 that are not in the left-most column 24 of secondelectrodes 20. That is, the primary traces 26 connected to the secondelectrodes 20 that are not in the left-most column 24 extend below the“sixth” secondary trace 30 b without making an electrical connection tothe “sixth” secondary trace 30 b. The construction of the insulatingmaterial 28, along with that of the secondary traces 26, will bedescribed in greater detail below.

As such, the secondary traces 30 provide unique electrical connectionsfor each “pair” of the first electrodes 18 and the second electrodes 20(i.e., one of the first electrodes 18 and one of the second electrodes20 associated and inter-digitated with that particular first electrode18). For example, referring again to FIG. 4, one such pair of electrodesmay include the top-most first electrode 18 and the left-most secondelectrode 20 in the top row 22. Through the secondary traces 30, thispair of electrodes is provided with electrical connections specificallythrough the “first” secondary trace 30 a and the “sixth” secondary trace30 b. However, the pair of electrodes that includes the top-most firstelectrode 18 and the next second electrode 20 to the right in the toprow 22 is provided with electrical connections through the left-mostsecondary trace 30 and the “fifth” secondary trace 30 as shown in FIG.4.

It should also be understood that the touch sensor array 12 may includean additional set of traces not shown in the figures. This additionalset of traces may be used to provide a ground to electrically isolatethe first electrodes 18 and the immediately neighboring primary traces26 connected to the second electrodes 20. As such, each of the groundtraces may be electrically connected to one of the secondary traces 30in a manner similar to the respective primary traces 26. The groundtraces may be all connected to the same secondary trace that is used toconnect them to the system ground.

In the particular example shown in FIGS. 3 and 4, thirty pairs ofelectrodes are included, and unique electrical connections are providedto each of the pairs using twelve secondary traces 30, while the central(or active) portion 14 of the substrate 12 includes only a single layerof structures formed thereon.

It should be noted, in other embodiments, the insulating material 28 maybe a flexible substrate, such as an FPC, attached to the substrate 12.However, in an embodiment utilizing an FPC, the electrical connectionsbetween the primary traces 26 and the secondary traces 30 may be similarto those described above and shown in FIGS. 3 and 4, as well as thosedescribed below with respect FIGS. 5-11. In other words, when consideredschematically, FIGS. 3, 4, and 5-11 may be understood to illustrate theelectrical connections betweens the primary traces 26 and the secondarytraces 30 in embodiments utilizing the insulating material formed on thesubstrate 12 as well as those utilizing an FPC.

In operation, the secondary traces 30 are coupled to (i.e., are inoperable communication with) an electronic system (an example of whichis described below). In general, the capacitive sensor array 10 isoperated by providing a signal to one of the first electrodes 18 (i.e.,TX electrodes) while grounding the other first electrodes 18. Signalsare generated in the second electrodes 20 associated with the drivenfirst electrode 18 by electrical coupling of the driven first electrode18 to the second electrodes 20 associated with the driven firstelectrode 18. The signal induced in the second electrodes 20 may changedue to the presence of an object (e.g., a finger) on, or near, thatportion of the sensor array 10. The signal change in the secondelectrodes 20 is indicative of change in the capacitance between thesecond electrode 20 and the respective first electrode (i.e., “mutualcapacitance”). This process is continuously repeated for each of thefirst electrodes 18 and each of the associated rows of second electrodes20.

In the embodiment shown in FIG. 3, the primary traces 26 for the secondelectrodes 20 are routed to the long(er) sides of the substrate 12. Asshown, the primary traces 26 connected to the second electrodes 20 thatoccupy the left side of the central portion 14 (i.e., are closer to theouter portion 16 on the left) extend into the outer portion 16 on theleft. Likewise, the primary traces 26 connected to the second electrodes20 that occupy the right side of the central portion 14 (i.e., arecloser to the outer portion 16 on the right) extend into the outerportion 16 on the right. The primary traces 26 for the first electrodes18 are arranged such that some (e.g., for the first electrodes 18 in theupper region of the central portion 14) extend into the outer portion 16on the left, while the remaining primary traces 26 (e.g., for the firstelectrodes in the lower region of the central portion 14) extend intothe outer portion 16 on the right. This method of routing may minimizethe size of the side bezels, and also minimizes the width of the gapbetween the sensor rows 22.

Although the “side” bezel topology shown in FIG. 3 may be implementedusing ITO formed on glass, it may be most suitable for ITO on PET, as inthis topology the length of the primary traces 26 is relatively shortcompared to the “bottom” bezel topology described below. Furthermore,due to geometrical configuration of the electrodes, there are far lesstraces in the gap between consecutive rows. Thus, the traces in a sidebezel configuration may be wider, and the material used for the tracesmay have higher sheet resistance. Typically, ITO/PET has a higher sheetresistance than that of ITO/glass.

Furthermore, to keep manufacturing costs lower than ITO/Glasstechnology, usually photolithography is not used for patterning ITO/PET.Therefore, the minimum line width and space in ITO/PET is much higherthan those in ITO/Glass. Nevertheless, in side bezel sensors, highersheet resistance and greater trace widths may be tolerated. Therefore,ITO/PET with greater ITO sheet resistance and wider traces may bepreferred for side bezel topology.

FIG. 5 illustrates the touch sensor array 10 according to anotherembodiment of the present invention. Similar to the embodiment shown inFIG. 3, the touch sensor array 10 shown in FIG. 5 includes a substrate12 with an active portion 14 and a bezel portion 16. However, only onebezel portion 16 is included along the bottom (as shown in FIG. 5) edgeof the substrate 12. The touch sensor array 10 also includes an array offirst electrodes 18 and second electrodes 20. The substrate 12 as shownin FIG. 5 has been rotated compared to that of FIG. 3 such that thecolumns 24 correspond to the first electrodes 18, and the rows 22correspond to the second electrodes 20.

Because there is only one bezel portion 16, all of the primary traces 26extend from the first electrodes 18 and second electrodes 20 towards thebottom of the substrate 12, across the entire active portion 14. Withinthe bezel portion 16, the primary traces 26 are electrically connectedto the secondary traces 30 in a manner similar to that described above(i.e., such that each electrode pair is provided electrical connectionsthrough a unique pair of the secondary traces 30).

One skilled in the art may appreciate that due to the electricalresistance of the traces, the embodiment shown in FIG. 5 may be moresuitable for smaller devices (e.g., with diagonal lengths across theactive area 14 of, for example, 10 centimeters or less).

FIGS. 6, 7, and 8 illustrate, in greater detail, the insulating material28, the primary traces 26, and the secondary traces 30 on an outerportion 16 of substrate 12 according to one embodiment of the presentinvention. The example shown includes nine primary traces 26, with sevenof the primary traces 26 being electrically connected to a firstsecondary trace 30 (FIG. 7) and two of the primary traces 26 (extendingfarther into the insulating material 28) being electrically connected toa second secondary trace 30 (FIG. 8). The electrical connections aremade through via-holes 32 that are filled with a conductive material 34.As shown specifically in FIG. 7, two of the primary traces 26 areinsulated from the first of the secondary traces 30 by the insulatingmaterial 28 due, at least in part, to the lack of a via-hole 32 andconductive material 34 formed at those locations.

FIGS. 9, 10, and 11 illustrate an outer (or bezel) portion 16 of thesubstrate 12 and a process for forming the connections between theprimary traces 26 and the secondary traces 30 according to oneembodiment. Although not specifically shown, in order to form theelectrodes (e.g., electrodes 18 and 20 in FIG. 3), a layer oftransparent conductive material, such as ITO or a silver nano-particlefilm, may be deposited on (or over) the substrate 12. The depositionmethod used may depend on the material chosen. For example, if thematerial is ITO, the material may be deposited by vacuum sputtering. Ifthe material is silver nano-particles, the material may be deposited byvariety of techniques such as dipping method, spin coating, etc. In apreferred embodiment of the invention, the sheet resistance of theconductive material is less than or equal 50 ohm/square.

The conductive layer may then be patterned. Patterning may be achievedby various methods. For example, a resist layer may be deposited on theconductive layer, and the conductive material may be chemically removedin selected areas. Alternatively, patterning the conductive layer may beachieved by removing the material from selected areas using methods suchas laser ablation and plasma etching. As another alternative, by using amask, the conductive layer may be deposited only on the desired areas ofthe substrate 12. In other words, the conductive material may bedeposited in the final desired pattern (i.e., in the appropriate shapeto form the electrodes 18 and 20 and the primary traces 26). In such acase, no removal of material is necessary.

As another alternative, the pattern may be generated by the lift offprocess. In such a process, a mask material is laid down on the baresubstrate 12 on the deletion areas where the conductive material is notdesired. The conductive material is then deposited on the wholesubstrate indiscriminately. The mask material may then be chemicallyremoved from the substrate 12 to leave the conductive material inselected areas. In a preferred embodiment of the invention, the finishedpattern has a minimum line width of 30 μm, and minimum spacing of 10 μm.

Referring now to FIG. 9, the patterning is performed such that theprimary traces 26 extend into the outer portion 16 of the substrate 12.The insulating material (or dielectric layer) 28 is deposited (e.g.,using screen printing) on the outer portion 16 of the substrate 12 suchthat the end portions of the primary traces 26 are covered. Theinsulating material 28 includes a series of via-holes 32, with each ofthe via-holes 32 being positioned over a respective one of the primarytraces 26. The dielectric material 28 may be any insulating heat curingor UV curing ink available, such as LPI resist and acrylic resin.

Referring now to FIG. 10, the via-holes 32 are then filled with aconductive material to form a conductive via 34 in each of the via-holes32, which is in contact with the respective primary trace 26. In oneembodiment, the conductive material used to form the conductive via 34is silver ink or copper ink.

In one embodiment, the conductive vias 34 are formed using the samematerial, and during the same process step, as that is used to form thesecondary traces 30. In such an embodiment, the insulating material 28is thin enough to allow the material of the secondary traces 30 to flowinto the via-holes 32 and make reliable contact to the primary traces26. However, the insulating material 28 may be thick enough such that itdoes not have any pores or pinholes. In a preferred embodiment, theinsulating material 28 is between 5-10 μm thick. In another preferredembodiment, the insulating material 28 is black and acts as a decorativeband around the touch sensor array 10. In yet another embodiment of theinvention, the via-holes are initially filled with black carbon ink.

Then, as shown in FIG. 11, the secondary traces 30 are formed on theinsulating material 28, with each secondary trace 30 extending over, andcontacting, one (or more) of the conductive vias 34. Thus, each of thesecondary traces 30 is electrically connected to one (or more) of theprimary traces 26 through a conductive via 34. As such, the conductivevias 34 may represent contact points, or nodes, for the electricalconnection of the secondary traces 30 to the respective primary traces26. It should be noted that these contact points are external to (i.e.,not positioned over) the central portion 14 of the substrate 12.

A black ink may be used as the insulating material 28 to hide the tracesand interconnects in the outer portion 16. If the touch sensor device isa sensor on lens (SOL) design, it may be desirable to hide the metaltraces. A sensor on lens is a touch sensor device that includes a lensand the electrodes deposited on its bottom surface. In such anembodiment, the black ink may serve to hide the secondary traces andprovide insulation between the primary traces 26 and secondary traces30. The via-holes 32 in the black ink may still show the secondarytraces 30. To prevent this, the via-holes 32 may be filled withconductive carbon ink (which is also black). The use of a conductive inkalso facilitates the formation of a good electrical connection betweenthe primary traces 26 and the secondary traces 30.

Other colors may be used for the insulating material 28. For example, awhite insulating layer may be used. In such an embodiment, the via-holes32 are filled with white ITO ink, which is a mixture of ITO and a whitepigment, prior to the formation of the secondary traces 30. The whiteITO is also a conductive ink and is thus suitable to form the conductivevias 34.

In one embodiment, the insulating material (or bodies) 28 are onlyapplied over the primary traces 26 wherever necessary to avoid undesiredcontacts. Such an embodiment facilitates reducing the area of the bezelused for interconnections, reduces the amount of insulating materialused in the process, and eliminates any potential difficulties in makinggood contact between the primary traces 26 and the secondary traces 30,as via-holes and conductive vias are not needed. FIG. 12 illustratessuch an embodiment, including a row of second electrodes 20, primarytraces 26, and outer portion 16 of a substrate 12 according to anotherembodiment.

As shown, as the primary traces 26 extend into the outer portion 16, theprimary traces 26 “fan out.” That is, as the primary traces 26 extendinto the outer portion 16 of the substrate 12, the distance betweenadjacent primary traces 26 increases. Also of particular interest in theembodiment shown in FIG. 12 is the size and shapes (e.g., a “polygonal”shape) of the insulating material (or bodies) 28, which allows theinsulating material 28 to appropriately insulate and connect the primarytraces 26 and the secondary traces 30 without via-holes and/orconductive vias being formed therein. More specifically, the insulatingmaterial 28 allows the secondary traces 30 to pass over, and remaininsulated from, the appropriate primary traces 26. In the example shown,a first insulating body 28 is used to selectively insulate the primarytraces 26 connected to the second electrodes 20 from the secondarytraces 30, while a second insulating body 28 is used to selectivelyinsulate the primary traces 26 connected to the first electrode 18 fromthe secondary traces 30.

As shown, the first insulating body 28 is shaped to have multiple tiersor portions such that the width of the insulating material decreases asthe insulating material extends from the central portion 14 of thesubstrate 12. Further, it should be noted that the two outer mostsecondary traces 30 do not extend over the first insulating body 28.Thus, the size and shape of the first insulating body 28 allows for eachof the primary traces 26 shown to be electrically connected to only oneof the secondary traces 30 while minimizing the amount of insulatingmaterial used. Likewise, the second insulating body 28 insulates theprimary trace 26 connected to the first electrode 18 from all but theouter most secondary electrode, also while minimizing the amount ofinsulating material used.

To reduce the routing area in the bezel (or outer portion 16), the tracewidth and spacing of the traces in the bezel area are minimized. In apreferred embodiment, a metal trace line width of 10-50 μm and a spacingof 10-50 μm is used in the bezel area.

When the traces are very narrow (e.g., 10-50 μm) it may be difficult toestablish a low contact resistant between the primary traces 26 and thesecondary traces 30 unless the contact area is large enough. Stillreferring to FIG. 12, in one embodiment, the end portions of the primarytraces 26 are “bent” into an L-shaped pattern to increase the contactarea between the primary traces 26 and the secondary traces 30. Morespecifically, the end portions of the primary traces 26 are bent in adirection substantially parallel to the direction in which the secondarytraces 30 extend.

As mentioned with reference to FIG. 3, in some embodiments, width of thebase portion 25 of the second electrodes 20 varies to fill the voidspaces created otherwise. Referring again to FIG. 12, the secondelectrode 20 nearest to the bezel (i.e., the first second electrode)uses a short primary trace 26 and uses the minimum base portion width.The next primary trace 26 is positioned at least the width of the firstprimary trace 26 (e.g., 10-50 μm) plus a minimum spacing from the baseportion of the first second electrode 20 and may also have a minimumwidth of 30-50 μm. Therefore, the base portion of the next secondelectrode 20 may have a width which is wider than the first secondelectrode 20 base width by an amount equal to, for example, the width ofthe primary traces 26 combined with the distance between adjacentprimacy traces 26. Using such a layout method, the base of eachsubsequent second electrode 20 may increase by a fixed amount which isequal to the trace width combined with the trace spacing.

It should be noted that the order in which the components are formed onthe substrate 12 may be changed. For example, referring once again toFIG. 12, the secondary traces 30 may be formed on the outer portion 16of the substrate 12 before the insulating body 28 and the primary traces26 are formed. For example, the secondary traces 30 may be formed on theouter portion 16 in a flat, planar manner (i.e., not over the insulatingbody 28). The insulating body 28 may then be formed over the secondarytraces 30. Then, the primary traces 26 (along with the electrodes 18 and20) may then be formed such that they extend over the insulating body 28and connect with the secondary traces 30 in a manner similar to thatdescribed above. In such an embodiment, the lateral spatialrelationships between the primary traces 26, the secondary traces 30,and the insulating body 28 may be similar to that shown in FIG. 12.

FIG. 13 illustrates the touch sensor array 10 according to anotherembodiment of the present invention, which may be particularly wellsuited for large screen applications (e.g., having a diagonal lengthgreater than 25 cm). As may be apparent when comparing the embodimentsshown in FIGS. 3 and 5 with that shown in FIG. 13, the embodiment shownin FIG. 13 is a combination of the of the side bezel topology and thebottom bezel topology. That is, although the bezel (or outer) portions16 are positioned on the sides, both of the bezel portions 16 includesprimary traces 26 (and secondary traces 30) connected to the firstelectrodes 18 and the second electrodes 20. When compared to the bottombezel topology shown in FIG. 5, the embodiment shown in FIG. 13 may beconsidered to be a bottom bezel configuration rotated 90 degrees and“mirrored” about a center line 37 extending through the center portion14. However, as shown, each row 22 of electrodes includes only one firstelectrode 18 that extends across the entire center portion 14, which isconnected to each bezel portion 16 by a separate primary trace 26 (i.e.,the first electrodes 18 are connected to both bezels portions).

As discussed above, in other embodiments, the multi-layer routing of thetraces may be accomplished by using a flexible printed circuit (FPC)(and/or a FPC tail), which includes a flexible insulating substrate(i.e., made of an insulating material) with a series of traces (i.e.,secondary traces) formed thereon. In such an embodiment, the FPC tailmay be coupled to the substrate (e.g., substrate 12) at the edge (oredges) of the active portion 14 and may be wrapped around the substrate12, effectively eliminating the bezel portion 16 of the array.

FIG. 14 schematically illustrates an embodiment utilizing an FPC (and/orFPC tail) 36. As shown, similar to the embodiments described above, thesubstrate 12 includes primary traces 26 that extend onto the outerportion 16 of the substrate 12. However, a substrate bond pad 38 (e.g.,made of ITO or silver) is formed at the end portion of each of theprimary traces 26. Although not specifically shown in FIG. 14, the FPC36 includes one or more flexible insulating layers (e.g., polyamide,polyimide, or PET) interlaced with one or more conductive layers (e.g.,copper), which may be formed (or etched) into a series of traces (i.e.,the secondary traces 30) that have FPC bond pads 40 at the end portionsthereof.

Each substrate bond pad 38 is electrically connected to a unique FPCbond pad 40. In a manner similar to the insulating material 28 formed onthe substrate material 28 described above, the desired interconnectionsbetween the primary traces 26 and the secondary traces 30 are madewithin the FPC 36. For example, in FIG. 14 it is shown that the secondprimary trace 26 from the left is connected to the eighth primary trace26 from the left through the secondary traces 30 on the FPC 36. Theother secondary traces 30 that are connected to a chip 42 on the FPC 36and encounter the trace 30 connected to the second pad 40 from the leftwill have to “jump over” (or remain insulated from) that trace to avoidunwanted electrical connection. These jumps are schematically shown inFIG. 14 by reference numeral 44. In an FPC, these interconnections arerealized by using two conductive layers on the FPC tail and via-holesthat interconnect the two layers.

FIGS. 15-17 illustrate an embodiment of the touch sensor array 10 thatmay use the bottom bezel topology shown in FIG. 5. However, as shown,the substrate 12 has been rotated 90 degrees such that the bezel portion16 is position on the right side of the substrate 12. In thisembodiment, an FPC tail 36 is used to both route the signals from theprimary traces 26 (e.g., via bond pads 38 and 40) shown in FIG. 14 aswell as connecting to an external system. As shown specifically in FIG.17, the electrical connections between the primary traces 26 and thesecondary traces 30 (formed on the FPC 36) are made via the substratebond pads 40 at the end portion of the primary traces 26, a bondingmaterial 48, the FPC bond pads 40 formed on the FPC 36, and a conductivematerial (or via) 34 formed through the FPC 36 (which interconnects theFPC bond pads 40 and the secondary traces 30). As will be appreciated byone skilled in the art, the FPC 36 may be manufactured and configuredbefore being attached to the substrate 12 (i.e., the FPC bond pads 40,the conductive vias 34, and the secondary traces 30 may be selectivelyformed on the FPC 36 before the FPC 36 is attached to the substrate 12).

In one embodiment, the bonding material 48 is an anisotropic conductivefilm (ACF), which includes microscopic conductive spheres distributed ina matrix of a soft insulating material. When pressure is applied, thespheres come to contact with each other and form a conduction path forthe electric signals. When the ACF is deposited between the sensor bondpads 38 and the FPC bond pads 40, the pressure is only applied in theregions trapped vertically between the pads 38 and 40. Therefore,conduction paths are formed only in the pads regions (i.e., between eachsensor bond pad 38 and the associated FPC bond pad 40, even if the ACFis deposited between adjacent sensor bond pads 38 on the substrate 12and/or between adjacent FPC bond pads 40 on the FPC.

FIGS. 18-20 illustrate an embodiment of the touch sensor array 10 thatmay be similar to that shown in FIG. 13. That is, the touch sensor array10 in FIGS. 15 and 16 includes two bezel portions 16. The touch sensorarray 10 is arranged such that the bezel portions 16 occupy the topportion and the bottom portion of the device. As shown in FIG. 19, thetop bezel portion 16 utilizes the insulating material 28 formed on thesubstrate, such as that shown in FIGS. 6-11. However, as shown in FIG.20, the bottom bezel portion 16 utilizes an FPC tail 36 for routing, aswell as for connecting to an external system. Additionally, as shown inboth FIGS. 19 and 20, a series of routing traces 46 (which may besimilar to the secondary traces 30 formed on the insulating material 28)are formed along an edge of the central portion 14 of the substrate 12.The routing traces 46 are electrically connected to the secondary traces30 on the insulating material 28 at the top bezel portion 16 andelectrically connected to the traces within the FPC tail 36. It shouldbe understood that in other embodiment, an FPC may also be used in thetop bezel portion 16 for routing the signals from the primary traces 26to the routing traces 46 (and not for connecting to an external system).Additionally, although the embodiment shown is depicted as having all ofthe second electrodes facing or oriented in the same direction, in otherembodiments, particularly those used in large screen applications, theelectrodes may be arranged such that some (e.g., those on one half ofthe substrate 12) face or are oriented in one direction, while theremaining are oriented in the opposite direction.

Furthermore, in some embodiments, an FPC with a tail may also be used inboth the top and bottom bezel portions 16 for both routing the signalsfrom the primary traces 26 and connecting to an external system (i.e.,the top bezel portion and the bottom bezel portion utilize separateFPCs/FPC tails). An example of such an embodiment is shown in FIG. 21.

FIGS. 22-25 illustrate a further embodiment of the present invention. Ofparticular interest in FIGS. 22-25 is that the insulating material 28 isformed on a second substrate 50 that is separate from the (firstelectrode) substrate 12. As shown, the second substrate 50 is connectedto the first substrate 12 by a FPC (or a Flat Flex Connector FFC) 36. Aswill be appreciated by one skilled in the art, particularly in light ofthe use of the FPC described above, the FPC 36 in FIGS. 22-25 is used toelectrically connect the primary traces 26 on the first substrate 12 tothe secondary traces 30 on the insulating material 28 via bond padsformed on the first substrate 12 (e.g., near the edge or outer portionthereof), traces on the FPC 36, and bond pads and additional traces onthe second substrate 50. As such, the secondary traces 30 shown in FIG.22 may be electrically connected to the primary traces 26 on the firstsubstrate 12 in a manner similar to that described above. Additionally,although not specifically shown, it should be understood that othercomponents may be mounted on (or attached to) the second substrate 12,such as integrated circuits, as well as other active and passivecomponents.

Furthermore, because of the flexible nature of the FPC 36 (i.e., incontrast to the rigid material of the first and second substrates, suchas glass and a printed circuit board, respectively), the secondsubstrate 50 may be mounted in various orientations and/or positionsrelative to the first substrate 12. Examples of such orientations and/orpositions are illustrated in FIGS. 23-25.

FIGS. 26-30 illustrate alternative shapes and arrangements of the firstelectrodes 18 and the second electrodes 20, according to variousembodiments of the present invention. For example, the embodiment shownin FIG. 26 includes a first electrode 18 and second electrodes 20 thatinclude intertwined “spiral” structures, as opposed to the “comb” and“E” shaped structures previously discussed. However, it should beunderstood that other shapes and arrangements may be used, as shown bythe various embodiments illustrated in FIGS. 27-30.

In other embodiments, different materials may be used to form theelectrodes, such as copper, aluminum, silver, or any suitable conductivematerial that may be appropriately patterned. Furthermore, an FPC may beused to form the electrodes. In such an embodiment, the variousconductive layers in the FPC may be appropriately configured to form thearray of electrodes as described above, as well as to form the primarytraces. As such, it should be understood that the electrodes, thetraces, and the insulating material (or body) may all be formed by asingle, appropriately configured FPC. As will be appreciated by oneskilled in the art, such embodiments may be particularly applicable tonon-transparent devices, such as mouse pads, track pads, touch pads,etc. Additionally, in other embodiments, the substrate may be made ofother materials, such as any suitable plastic, including vinyl andpolyamide, which may not be transparent, depending on the particulardevice.

In other embodiments, the sensor may be formed by laying out the sensorelectrodes using alternative conductive materials such as metal mesh. Inthis embodiment, the electrodes are formed by disposing metal meshelectrodes on PET substrate. In an alternative embodiment, the metalmesh electrodes may be disposed on glass substrate. In anotherembodiment, the electrodes may be formed with silver nano-wires on PETor silver nano-wire on glass substrate.

In another embodiment, the sensor may be formed by bonding a glass (orother transparent insulating) lens onto another glass with the sensorpattern disposed on. In yet another embodiment, the sensor may be formedby bonding glass (or other transparent insulating material) onto a sheetof PET containing the sensor pattern.

As such, embodiments described herein provide a capacitive sensor devicewith a single layer structure in the active portion of the device, whilea multi-layer structure is used in the bezel (or other non-sensing)portions for routing the traces. The multi-layer routing allows therepeated use of the traces so that the device uses the absolute minimumnumber of traces, and the minimum number of pins on the electronicsystem which drives the device.

With respect to the embodiments described above, the gap between therows 22 (e.g., FIG. 3) is determined by the maximum number of primarytraces 26 extending into the bezel portion(s) 16.

As will be appreciated by one skilled in the art, it is preferable tominimize the gap size by minimizing the trace widths and the spacebetween the traces. The minimum trace width may be determined by theresistance of the traces and the limits of the process used to form thetraces. The width of traces made of ITO may be minimized by lowering thesheet resistance of the ITO. In some embodiments, in order to avoidcross coupling between the first and second electrodes of theneighboring rows (or columns), a ground trace may be formed, which wouldincrease the minimum gap size.

However, when the substrate is glass, rather than PET, lower sheetresistance of ITO and better trace width and spacing may be achieved,which leads to reducing the gap size between the neighboring electrodes.

Further, the pitch size (i.e., the distance between the centers of thetwo neighboring sensor cells or electrodes) may be adjusted by varyingthe pad size (i.e. the width of one of the second electrodes 20).However, it may be preferable to use a pitch of 6 mm or less.

FIG. 31 illustrates a block diagram of one embodiment of an electronicsystem having a processing device for detecting a presence of aconductive object according to an embodiment of the present invention.The electronic system 100 includes a processing device 110, atouch-sensor pad 120, a touch-sensor slider 130, touch-sensor buttons140, a host processor 150, an embedded controller 160, andnon-capacitance sensor elements 170. The processing device 110 mayinclude analog and/or digital general purpose input/output (“GPIO”)ports 107. The GPIO ports 107 may be programmable and may be coupled toa Programmable Interconnect and Logic (“PIL”), which acts as aninterconnect between the GPIO ports 107 and a digital block array of theprocessing device 110. The processing device 110 may also includememory, such as random access memory (“RAM”) 105 and program flash 104.The RAM 105 may be static RAM (“SRAM”), and the program flash 104 may bea non-volatile storage, which may be used to store firmware (e.g.,control algorithms executable by processing core 102 to implementoperations described herein). The processing device 110 may also includea memory controller unit (“MCU”) 103 coupled to memory and theprocessing core 102.

The processing device 110 may also include one or more analog blocksarray coupled to the system bus. The analog blocks array also may beconfigured to implement a variety of analog circuits (e.g., ADCs, DACs,analog filters, etc.). The analog block array may also be coupled to theGPIO 107.

As illustrated, the capacitance sensing circuit 101 may be integratedinto the processing device 110. The capacitance sensing circuit 101 mayinclude analog I/O for coupling to an external component, such as thetouch-sensor pad 120, the touch-sensor slider 130, the touch-sensorbuttons 140, and/or other devices. The capacitance sensing circuit 101and the processing device 110 are described in more detail below.

The embodiments described herein are not limited to touch-sensor padsfor notebook implementations, but can be used in other capacitivesensing implementations, for example, the sensing device may be a touchscreen, a touch-sensor slider 130, or touch-sensor buttons 140 (e.g.,capacitance sensing buttons). In one embodiment, these sensing devicesmay include one or more capacitive sensors. The operations describedherein are not limited to tablet computers, smartphones, touchscreenphone handsets, mobile internet devices (MIDs), GPS navigation devices,electronic books, notebook pointer operations, but can include otheroperations, such as lighting control (dimmer), volume control, graphicequalizer control, speed control, or other control operations requiringgradual or discrete adjustments. It should also be noted that theseembodiments of capacitive sensing implementations may be used inconjunction with non-capacitive sensing elements, including but notlimited to pick buttons, sliders (ex. display brightness and contrast),scroll-wheels, multi-media control (ex. volume, track advance, etc)handwriting recognition and numeric keypad operation.

In one embodiment, the electronic system 100 includes a touch-sensor pad120 coupled to the processing device 110 via bus 121. The touch-sensorpad 120 may include a multi-dimension sensor array. The multi-dimensionsensor array includes multiple sensor elements, organized as rows andcolumns, such as the sensor arrays described above and shown in, forexample, FIGS. 3, 5, and 13. In another embodiment, the electronicsystem 100 includes a touch-sensor slider 130 coupled to the processingdevice 110 via bus 131. The touch-sensor slider 130 may include asingle-dimension sensor array. The single-dimension sensor arrayincludes multiple sensor elements, organized as rows, or alternatively,as columns. In another embodiment, the electronic system 100 includestouch-sensor buttons 140 coupled to the processing device 110 via bus141. The touch-sensor buttons 140 may include a single-dimension ormulti-dimension sensor array. The single- or multi-dimension sensorarray may include multiple sensor elements. For a touch-sensor button,the sensor elements may be coupled together to detect a presence of aconductive object over the entire surface of the sensing device.Alternatively, the touch-sensor buttons 140 may have a single sensorelement to detect the presence of the conductive object. In oneembodiment, the touch-sensor buttons 140 may include a capacitive sensorelement. The capacitive sensor elements may be used as non-contactsensor elements. These sensor elements, when protected by an insulatinglayer, offer resistance to severe environments.

The electronic system 100 may include any combination of one or more ofthe touch-sensor pad 120, the touch-sensor slider 130, and/or thetouch-sensor button 140. In another embodiment, the electronic system100 may also include non-capacitance sensor elements 170 coupled to theprocessing device 110 via bus 171. The non-capacitance sensor elements170 may include buttons, light emitting diodes (“LEDs”), and other userinterface devices, such as a mouse, a keyboard, or other functional keysthat do not require capacitance sensing. In one embodiment, buses 171,141, 131, and 121 may be a single bus. Alternatively, these buses may beconfigured into any combination of one or more separate buses.

The processing device 110 may include internal oscillator/clocks 106 anda communication block (“COM”) 108. The oscillator/clocks 106 providesclock signals to one or more of the components of the processing device110. The communication block 108 may be used to communicate with anexternal component, such as a host processor 150, via host interface(“I/F”) line 151, using signaling protocols such as, but not limited toI2C, SPI or USB. Alternatively, the processing block 110 may also becoupled to embedded controller 160 to communicate with the externalcomponents, such as host 150. In one embodiment, the processing device110 is configured to communicate with the embedded controller 160 or thehost 150 to send and/or receive data.

The processing device 110 may reside on a common carrier substrate suchas, for example, an integrated circuit (“IC”) die substrate, amulti-chip module substrate, or the like. Alternatively, the componentsof the processing device 110 may be one or more separate integratedcircuits and/or discrete components. In one exemplary embodiment, theprocessing device 110 may be a Programmable System on a Chip (“PSoC™”)processing device, manufactured by Cypress Semiconductor Corporation,San Jose, Calif. Alternatively, the processing device 110 may be one ormore other processing devices known by those of ordinary skill in theart, such as a microcontroller, a microprocessor or central processingunit, a controller, a special-purpose processor, a digital signalprocessor (“DSP”), an application specific integrated circuit (“ASIC”),a field programmable gate array (“FPGA”), or the like.

It should also be noted that the embodiments described herein are notlimited to having a configuration of a processing device coupled to ahost, but may include a system that measures the capacitance on thesensing device and sends the raw data to a host computer where it isanalyzed by an application. In effect the processing that is done byprocessing device 110 may also be done in the host.

The capacitance sensing circuit 101 may be integrated into the IC of theprocessing device 110, or alternatively, in a separate IC.Alternatively, descriptions of the capacitance sensing circuit 101 maybe generated and compiled for incorporation into other integratedcircuits. For example, behavioral level code describing the capacitancesensing circuit 101, or portions thereof, may be generated using ahardware descriptive language, such as VHDL or Verilog, and stored to amachine-accessible medium (e.g., CD-ROM, hard disk, floppy disk, etc.).Furthermore, the behavioral level code can be compiled into registertransfer level (“RTL”) code, a netlist, or even a circuit layout andstored to a machine-accessible medium. The behavioral level code, theRTL code, the netlist, and the circuit layout all represent variouslevels of abstraction to describe the capacitance sensing circuit 101.

It should be noted that the components of the electronic system 100 mayinclude all the components described above. Alternatively, theelectronic system 100 may include only some of the components describedabove.

In one embodiment, the electronic system 100 may be used in a notebookcomputer. Alternatively, the electronic system 100 may be used in otherapplications, such as a mobile handset, a personal data assistant(“PDA”), a keyboard, a television, a remote control, a monitor, ahandheld multi-media device, a handheld video player, a handheld gamingdevice, or a control panel.

The conductive object in this case is a finger, alternatively, thistechnique may be applied to any conductive object, for example, aconductive door switch, position sensor, or conductive pen in a stylustracking system.

Although the foregoing examples have been described in some detail forpurposes of clarity of understanding, the invention is not limited tothe details provided. There are many alternative ways of implementingthe invention. The disclosed examples are illustrative and notrestrictive.

Thus, in one embodiment, a capacitance sensing device is provided. Thecapacitance sensing device includes a substrate having a central portionand an outer portion. A plurality of substantially co-planar electrodesare on the central portion substrate. A first plurality of conductorsare on the substrate. Each of the first plurality of conductors has afirst end portion electrically connected to one of the plurality ofelectrodes and a second end portion on the outer portion of thesubstrate. An insulating material is coupled to the second end portionsof the first plurality of conductors. A second plurality of conductorsis coupled to the insulating material. The second plurality ofconductors and the insulating material are configured such that each ofthe second plurality of conductors is electrically connected to thesecond end portion of at least some of the first plurality of conductorsand is insulated from the second end portion of the others of the firstplurality of conductors.

In another embodiment, a capacitance sensing device is provided. Thecapacitance sensing device includes a substrate having a central portionand an outer portion. A first set of electrodes is formed on the centralportion substrate. A second set of electrodes is formed on the centralportion of the substrate. The second set of electrodes is arranged in aseries of rows and is substantially co-planar with the first set ofelectrodes. A first plurality of conductors are formed on the substrate.Each of the first plurality of conductors has a first end portionelectrically connected to one of the first set of electrodes and asecond end portion on the outer portion of the substrate. A secondplurality of conductors are formed on the substrate. Each of the secondplurality of conductors has a first end portion electrically connectedto one of the second set of electrodes and a second end portion on theouter portion of the substrate. An insulating body is coupled to thesecond end portion of each of the first plurality of conductors and thesecond end portion of each of the second plurality of conductors. Athird plurality of conductors is coupled to the insulating body suchthat each is electrically connected to one of the second end portion ofone of the first plurality of conductors and the second end portion ofthe second plurality of conductors associated with only one row of thesecond set of electrodes and is electrically insulated from the secondend portion of the others of the first set of conductors and the secondend portion of the second plurality of conductors associated with theother rows of the second set of electrodes.

In a further embodiment, a capacitance sensing device is provided. Thecapacitance sensing device includes a substrate having a central portionand an outer portion. A first set of electrodes is formed on the centralportion substrate. A second set of electrodes is formed on the centralportion of the substrate. The second set of electrodes is arranged in aseries of rows and substantially co-planar with the first set ofelectrodes. A first plurality of conductors are on the substrate. Eachof the first plurality of conductors has a first end portionelectrically connected to one electrode of the first set of electrodesor the second set of electrodes and a second end portion on the outerportion of the substrate. A second plurality of conductors is coupled tothe substrate. Each of the second plurality of conductors iselectrically connected to at least one of the first plurality ofconductors at a node that is external to the central portion of thesubstrate such that each of the second plurality of conductors iselectrically connected to one electrode of the first set of electrodesor a plurality of electrodes in one of the rows of the second set ofelectrodes.

In a further embodiment, a method for constructing a capacitance sensingdevice is provided. A plurality of electrodes are formed on a centralportion of a substrate. The substrate has a central portion and an outerportion. A first plurality of conductors are formed on the substrate.Each of the first plurality of conductors is connected to and extendsfrom at least one of the plurality of electrodes. An insulating materialis formed on the outer portion of the substrate and at least partiallyover some of the first plurality of conductors. A second plurality ofconductors are formed on the insulating material, wherein the secondplurality of conductors and the insulating material are configured suchthat each of the second plurality of conductors is electricallyconnected to at least some of the first plurality of conductors and isinsulated from the others of the first plurality of conductors.

In a further embodiment, a method for constructing a capacitance sensingdevice is provided. A plurality of substantially co-planar electrodesare formed on the central portion of the substrate. A first plurality ofconductors are formed on the substrate. Each of the first plurality ofconductors has a first end electrically connected to one of theplurality of electrodes and a second end portion on the outer portion ofthe substrate. An insulating body is attached to the outer potion of thesubstrate adjacent to the second end portions of the first plurality ofconductors. Each of a second plurality of conductors on the insulatingbody is electrically connected to the second end portion of at leastsome of the first plurality of conductors. Each of the second pluralityof conductors is insulated from the second end portion of the others ofthe first plurality of conductors by the insulating body.

In a further embodiment, a method for constructing a capacitance sensingdevice is provided. A substrate having a central portion and an outerportion is provided. A plurality of substantially co-planar electrodesis formed over the central portion substrate. A first plurality oftraces are formed over the substrate. Each of the first plurality oftraces have a first end portion electrically connected to one of theplurality of electrodes and a second end portion over the outer portionof the substrate. An insulating body is formed over the outer potion ofthe substrate. The insulating body has a first width at a first portionthereof and a second width at a second portion thereof. The first widthis greater than the second width. A second plurality of traces areformed over the outer portion of the substrate. The first plurality oftraces, the second plurality of traces, and the insulating material arearranged such that each of the second plurality of traces iselectrically connected to at least some of the first plurality of tracesand is insulated from the others of the first plurality of traces.

In a further embodiment, a capacitance sensing device is provided. Thecapacitance sensing device includes a substrate having a centralportion, a first outer portion, and a second outer portion. The firstouter portion and the second outer portion are on opposing sides of thecentral portion. A plurality of substantially co-planar electrodes areon the central portion substrate. A first plurality of conductors are onthe substrate. Each of the first plurality of conductors having a firstend portion electrically connected to one of the plurality of electrodesand a second end portion on the first outer portion or the second outerportion of the substrate. A first insulating body is coupled to thefirst outer portion of the substrate. A second insulating body iscoupled to the second outer portion of the substrate. A second pluralityof conductors are included. Each of the second plurality of conductorsis coupled to the first insulating body or the second insulating body.The second plurality of conductors, the first insulating body, and thesecond insulating body are configured such that each of the secondplurality of conductors is electrically connected to the second endportion of at least some of the first plurality of conductors on therespective outer portion of the substrate and is insulated from theothers of the first plurality of conductors by the respective insulatingbody.

In a further embodiment, a capacitance sensing device is provided. Thecapacitance sensing device includes a first substrate having a centralportion and an outer portion. A plurality of substantially co-planarelectrodes are on the central portion of the first substrate. A firstplurality of conductors are on the substrate. Each of the firstplurality of conductors has a first end portion electrically connectedto one of the plurality of electrodes and a second end portion on theouter portion of the first substrate. A second substrate is alsoincluded. A second plurality of conductors are connected to the secondsubstrate. At least one insulating body is coupled to the firstsubstrate and the second substrate, wherein the second plurality ofconductors and the at least one insulating body are configured such thateach of the second plurality of conductors is electrically connected toat least some of the first plurality of conductors and is insulated fromthe others of the first plurality of conductors.

In a further embodiment, a method for constructing a capacitance sensingdevice is provided. A substrate having a central portion, a first outerportion, and a second outer portion is provided. The first outer portionand the second outer portion are on opposing sides of the centralportion. A plurality of substantially co-planar electrodes are formed onthe central portion substrate. A first plurality of conductors areformed on the substrate. Each of the first plurality of conductors has afirst end portion electrically connected to one of the plurality ofelectrodes and a second end portion on the one of first outer portionand the second outer portion of the substrate that is closer to therespective one of the plurality of electrodes. A first insulating bodyis attached to the first outer portion of the substrate. A secondinsulating body is attached to the second outer portion of thesubstrate. Each of a second plurality of conductors on the firstinsulating body and the second insulating body are electricallyconnected to the second end portion of at least some of the firstplurality of conductors on the respective outer portion of thesubstrate. Each of the second plurality of conductors is insulated fromthe others of the first plurality of conductors by the respectiveinsulating body.

Although the foregoing examples have been described in some detail forpurposes of clarity of understanding, the invention is not limited tothe details provided. There are many alternative ways of implementingthe invention. The disclosed examples are illustrative and notrestrictive.

1. A capacitance sensing device comprising: a substrate having a centralportion and an outer portion; a plurality of substantially co-planarelectrodes on the central portion substrate; a first plurality ofconductors on the substrate, each of the first plurality of conductorshaving a first end portion electrically connected to one of theplurality of electrodes and a second end portion on the outer portion ofthe substrate; an insulating material coupled to the second end portionsof the first plurality of conductors; and a second plurality ofconductors coupled to the insulating material, wherein the secondplurality of conductors and the insulating material are configured suchthat each of the second plurality of conductors is electricallyconnected to the second end portion of at least some of the firstplurality of conductors and is insulated from the second end portion ofthe others of the first plurality of conductors.
 2. The capacitancesensing device of claim 1, wherein the insulating material is formed onthe outer portion of the substrate, and the second plurality ofconductors are formed on the insulating material.
 3. The capacitancesensing device of claim 1, wherein the insulating material is not formedover the central portion of the substrate.
 4. The capacitance sensingdevice of claim 1, wherein the plurality of substantially co-planarelectrodes comprises a first set of electrodes and a second set ofelectrodes, wherein the second set of electrodes is arranged in a seriesof rows.
 5. The capacitance sensing device of claim 4, wherein the firstplurality of conductors comprises a first set of traces and a second setof traces, wherein the first end portion of each of the first set oftraces is electrically connected to one of the first set of electrodesand the first end portion of each of the second set of traces iselectrically connected to one of the second set of electrodes.
 6. Thecapacitance sensing device of claim 5, wherein the second plurality ofconductors and the insulating material are configured such that each ofthe second plurality of conductors is electrically connected to thesecond end portion of a selected one of the first set of traces or thesecond end portions of the second set of traces having first endportions electrically connected to the electrodes in one row of thesecond set of electrodes.
 7. The capacitance sensing device of claim 6,wherein the first set of electrodes and the second set of electrodescomprise a plurality of inter-digitated members.
 8. The capacitancesensing device of claim 7, wherein the members of each of the first setof electrodes is inter-digitated with the members from more than one rowof the second set of electrodes.
 9. The capacitance sensing device ofclaim 6, wherein the first set of electrodes and the second set ofelectrodes comprise a plurality of intertwined spiral formations. 10.The capacitance sensing device of claim 8, wherein the plurality ofelectrodes and the first plurality of conductors are substantiallytransparent.
 11. A capacitance sensing device comprising: a substratehaving a central portion and an outer portion; a first set of electrodesformed on the central portion of the substrate; a second set ofelectrodes formed on the central portion of the substrate, the secondset of electrodes being arranged in a series of rows and substantiallyco-planar with the first set of electrodes; a first plurality ofconductors formed on the substrate, each of the first plurality ofconductors having a first end portion electrically connected to one ofthe first set of electrodes and a second end portion on the outerportion of the substrate; a second plurality of conductors formed on thesubstrate, each of the second plurality of conductors having a first endportion electrically connected to one of the second set of electrodesand a second end portion on the outer portion of the substrate; aninsulating body coupled to the second end portion of each of the firstplurality of conductors and the second end portion of each of the secondplurality of conductors; and a third plurality of conductors coupled tothe insulating body such that each is electrically connected to one ofthe second end portion of one of the first plurality of conductors andthe second end portion of the second plurality of conductors associatedwith only one row of the second set of electrodes and is electricallyinsulated from the second end portion of the others of the first set ofconductors and the second end portion of the second plurality ofconductors associated with the other rows of the second set ofelectrodes.
 12. The capacitance sensing device of claim 11, wherein thefirst set of electrodes and the second set of electrodes comprise aplurality of inter-digitated members.
 13. The capacitance sensing deviceof claim 12, wherein the members of one of the first set of electrodesare inter-digitated with the members from more than one row of thesecond set of electrodes.
 14. The capacitance sensing device of claim13, wherein the insulating body is formed on the outer portion of thesubstrate, and the third plurality of conductors are formed on theinsulating body.
 15. The capacitance sensing device of claim 14, whereinthe insulating body and the third plurality of conductors are not formedover the central portion of the substrate.
 16. A capacitance sensingdevice comprising: a substrate having a central portion and an outerportion; a first set of electrodes formed on the central portionsubstrate; a second set of electrodes formed on the central portion ofthe substrate, the second set of electrodes being arranged in a seriesof rows and substantially co-planar with the first set of electrodes; afirst plurality of conductors on the substrate, each of the firstplurality of conductors having a first end portion electricallyconnected to one electrode of the first set of electrodes or the secondset of electrodes and a second end portion on the outer portion of thesubstrate; and a second plurality of conductors coupled to thesubstrate, each of the second plurality of conductors being electricallyconnected to at least one of the first plurality of conductors at a nodethat is external to the central portion of the substrate such that eachof the second plurality of conductors is electrically connected to oneelectrode of the first set of electrodes or a plurality of electrodes inone of the rows of the second set of electrodes.
 17. The capacitancesensing device of claim 16, wherein the second plurality of conductorsdoes not extend over the central portion of the substrate.
 18. Thecapacitance sensing device of claim 17, further comprising an insulatingmaterial coupled to the second end portions of the first plurality ofconductors and the second plurality of conductors, the insulatingmaterial electrically insulating each of the second plurality ofconductors from the others of the first plurality of conductors.
 19. Thecapacitance sensing device of claim 18, wherein the insulating materialdoes not extend over the central portion of the substrate.
 20. Thecapacitance sensing device of claim 16, wherein the first set ofelectrodes, the second set of electrodes, and the first plurality ofconductors comprise indium tin oxide.